DDR5 arrives in 2019/2020, is mainly about capacity

Posted on Friday, May 04 2018 @ 11:30 CEST by Thomas De Maesschalck
JEDEC is expected to finalize the DDR5 specification this summer. As we reported earlier this week, Cadence created the industry's first IP interface in silicon. Furthermore, Micron started sampling preliminary DDR5 memory chips to customers. Initial DDR5 may offer a frequency of 4400MHz and may eventually go to 6400MHz.

However, DDR5 isn't primarily about performance. The new memory standard delivers a variety of improvements, but it's primarily about capacity. We're going to see higher capacity DDR5 memory ticks, potentially with per-die capacity of up to 32Gb in the future.
There is a great demand for high DRAM capacity from various applications these days, but modern servers can physically accommodate a limited number of memory modules, and contemporary memory controllers can handle a limited number of DIMMs per channel. Therefore, to increase per-machine capacity of DRAM, manufacturers of memory need to build chips of higher capacity. The DDR5 standard enables memory makers to produce 16 Gb and 32 Gb chips by adding internal ECC to boost yields, although memory subsystems will still have to support their own ECC. The new standard also allows for optimizing internal segmentation and optimized timings. In addition to boosting maximum per-die capacity to 32 Gb (we are probably not going to see such DDR5 devices any time soon), JEDEC wants to make vertical stacking easier to simplify building chips based on multi-die chips.
It's mainly server demand that's driving this. AnandTech has an overview of what to expect over here. The first DDR5 systems are expected in the 2019/2020 timeframe and adoption is expected to be quick. Cadence expects DDR5 will overtake DDR4 by 2022.

Cadence DDR5 chips demo


About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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