The main focus point of DDR5 is an increase in capacity, this new standard will enable chip densities in excess of 16Gb. However, DDR5 will also provide a boost in performance, with frequencies of 4266MHz to eventually 6400MHz. There will also be higher energy efficiency, DDR5 will drop the supply voltage to 1.1V.
Interestingly, Cadence claims improved functionality of DDR5 will enable a 36 percent higher effective bandwidth compared to DDR4 even at 3200MHz. At 4800MHz, this should result in up to 87 percent higher bandwidth than what's possible with DDR4-3200. It will be interesting to see real-world benchmarks of this.
Leading DRAM makers already have monolithic DDR4 chips featuring a 16 Gb capacity, but those devices cannot offer extreme clocks or I/O speeds because of laws of physics. Therefore, companies like Micron have a lot of work to do in a bid to bring together high DRAM densities and performance in the DDR5 era. In particular, Micron is concerned about variable retention time, and other atomic level occurrences, once production technologies used for DRAM reach 10 – 12 nm. Meanwhile, the DDR5 Add/Cmd bus already features on-die termination to make signals cleaner and to improve stability at high data rates. Furthermore, high-end DDR5 DIMMs will have their own voltage regulators and PMICs. Long story short, while the DDR5 standard is tailored to wed performance and densities, there is still a lot of magic to be done by DRAM manufacturers.Servers will be the first application for DDR5. More details at AnandTech.