Samsung’s 5LPE technology relies on FinFET transistors with a new standard cell architecture and uses both DUV and EUV step-and-scan systems. The new fabrication process enables chip designers to reuse 7LPP IP on ICs designed for 5LPE while enjoying all benefits the latter provides. When compared to 7LPP, the new technology has an up to 25% higher ‘logic efficiency’, it also enables chip developers to reduce power consumption of their designs by 20% or improve their performance by 10%.Volume production of 5nm EUV chips at Samsung's Hwaseong fab is expected in 2020.
Samsung 5nm EUV gets a step closer
Posted on Tuesday, July 09 2019 @ 11:05 CEST by Thomas De Maesschalck