Intel Atom Tremont architecture may add L3 cache

Some more details popped up about "Tremont", the next-generation Intel Atom core that will be used by products like the Foveros-based Lakefield (which also has Sunny Cove cores) and the Snow Ridge SoC for 5G deployments. AnandTech reports technical documents published by Intel suggest Tremont will be the first Atom architecture to feature L3 cache memory.

Enabling an L3 cache on Atom does two potential things to Intel’s design: it adds power, but also adds performance. By having an L3, it means that data in the L3 is quicker to access than it would be in memory, however there is an idle power hit by having L3 present. Intel can mitigate this by enabling parts of the L3 to be powered on as needed, but there is always a tradeoff. There can also be a hit to die area, so it will be interesting to see how Intel has changed the microarchitecture of it’s Atom design. There is also no indication if the Tremont L3 cache is an inclusive cache, or a non-inclusive cache, or if it can be pre-fetched into, or if it is shared between cores or done on a per-core basis.