Toshiba working on 5-bit-per-cell NAND flash memory

Toshiba Memory, which will soon be known as Kioxia, talked about the future of flash at the Flash Memory Summit. The company discussed future versions of its BiCS flash and said that future iterations will coincide with new generations of the PCI Express standard.

BiCS Gen4 will soon launch for PCI Express 4.0 based solid state disks, this memory offers a bandwidth of up to 1200MB/s. With the arrival of PCI Express 5.0, we can expect BiCS Gen6 with 1600MT/s bandwidth and BiCS Gen7 will be launched alongside PCI Express 6.0, this memory will offer bandwidth in excess of 2000MT/s.

Toshiba also revealed that its engineers are working on penta-level cell (PLC) NAND flash memory. These chips will pack five bits per cell. The advantage here is that you can store even more per cell than QLC NAND flash memory, but the downside is that PLC will be even slower and have lower endurance than other types of flahs.

The new flash provides more density with the ability to store five bits per cell, rather than just four in current QLC. But, to do this, the cell needs to be capable of storing 32 distinct voltage levels, and SSD controllers need to read them back accurately. With so many voltage levels to read to and write at nano-scale, the new technology is very challenging. To get control of the tighter thresholds, the company had to develop some additional processes that may adapt to its current TLC and QLC to boost performance.

Full details at Tom's Hardware. The article has a bit more about XL-Flash as well as Toshiba's PCIe 4.0 SSDs.