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ARM response to RISC-V: allowing customized instructions

Posted on Monday, October 14 2019 @ 10:03:17 CEST by

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RISC-V is a rising star in the chip industry but now ARM is trying to counter it by loosening up control over the ARM instruction set architecture (ISA). Over at the ARM TechCon 2019 event, CEO Simon Segars announced the licensees will now be allowed to build custom instructions. This feature will be offered at no extra cost, but initially exclusively for the Cortex-M. The Cortex-R will follow later and eventually ARM may offer this feature on the Cortex-A too.
In the past, Arm resisted this move, intently focusing on the maintenance of a consistent programming model. Meanwhile, a host of other intellectual property (IP) companies made a good business out of customizable instruction sets. They include Tensilica (now part of Cadence) and ARC (now part of Synopsys). The venerable MIPS instruction set also supported user-defined instructions.

And now, with the rise of the open-source RISC-V ISA and its user configurability, it appears that Arm has finally relented and opened its instruction set for customized instructions. This new customizable capability and the Arm Flexible Access licensing program do address two main issues that are viewed by many as factors driving its customers to RISC-V.
Earlier this year, ARM already introduced more flexible license fee programs. The company is feeling the heat from the up-and-coming open-source RISC-V, but it's still by far the most popular chip IP. Over 150 billion ARM-based chips have hit the market to date and that number is expected to double in just two years.

Via: EE Times



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