Intel aims to make 1.4nm chips in 2029

Posted on Wednesday, December 11 2019 @ 14:29 CET by Thomas De Maesschalck
Over at this week's 2019 IEEE International Electron Devices Meeting (IEDM) in San Francisco, ASML CEO Martin van den Brink talked about the future of semiconductors. As you may know, Netherlands-based ASML is the world leader in semiconductor production equipment. The firm makes the tools that are used by Intel, TSMC, GlobalFoundries, Samsung, and others to manufacture cutting-edge chips.

Interestingly, van den Brink revealed what Intel plans to achieve over the next decade. The chip giant struggled massively with 10nm but they're working hard to get back to a roughly 2 years "tick tock" cadence.

The slide below reveals each future process node is intended to have 3 generations. This year Intel shipped the first 10nm chips, next year we can expect 10nm++ and in 2021 we should see 10nm+++. These will be on the market alongside the 7nm chips. The first 7nm EUV chips are expected in 2021, and are expected to be followed by 7nm+ in 2022 and 7nm++ in 2022.

As always, we suggest taking these slides with a grain of salt as projections this far into the future are usually wildly inaccurate. But if Intel's vision managed to materialize, we may see what Intel calls 5nm in 2023, 3nm in 2025, 2nm in 2027, and 1.4nm in 2029. The roadmap doesn't go beyond 2029 but the 5nm, 3nm and 2nm nodes are all expected to get + and ++ variants.

The 10nm++ chips are expected in 2020 and hopefully these will perform better than the 10nm+ parts. The current 10nm+ chips aren't very capable in terms of frequency, at the moment there's only one Ice Lake SKU that can hit 4GHz. That's a lot worse than the 14nm lineup, which can easily do 5GHz.

It also looks like Intel is going to use backporting for node manufacturing. This seems to line up with a recent rumor that Rocket Lake is a 14nm chip with 10nm features (Willow Cove cores).
Additionally, backporting is now going to node manufacturing, not IP only anymore. So far Intel spoke of backporting as a means to deliver new IP built for 10 nm for example to older process like 14 nm if needed. However, the new slide shows the intention of Intel to apply backporting techniques to a semiconductor process. For example, 7 nm can get backported to 10 nm node in form of 10 nm+++ so that it still officially is 10 nm by Intel's standards, but features overall transistor improvements that were supposed to be released on 7 nm node.
Intel process node roadmap

Source: TPU


About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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