AMD's future goals and next-generation architecture plans

Posted on Saturday, October 15 2005 @ 11:41 CEST by Thomas De Maesschalck

AnandTech has posted an article with some brief details about AMD's microprocessor architecture plans:

Now	Coming Soon	Future Goals
AMD64 Architecture	Extensions to AMD64	FPU Extensions to AMD64
Dual Coree Architecture	Multi-Core Architecture	Throughput Architecture
Direct Connect Architecture	Scalable SMP Architecture	On-chip Coprocessors
Enhanced Virus Protection	Pacifica Virtulization	Secure Execution
HyperTransport 1.0 and 2.0	HyperTransport 3.0	HyperTransport 4.0
DDR, DDR2	DDR3, FBDIMM	DDR4, FBD2
AMD PowerNow! Technology	Partitioned AMD PowerNow! Technology	System Resource Management
High Reliability RAS	Mainframe-class Reliability	Best-in-class Reliability
System Performance	System Performance per Watt	Throughput per Watt per Dollar

Read on over here.

About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.

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