New materials from Intel for software developers suggest the future 10nm Cannon Lake consumer processors will adopt the AVX-512 instruction set, as well as a bunch of other new instructions. At the moment, the AVX-512 instruction set is exclusively supported by Intel'x Xeon Skylake-SP processors but it looks like the instruction set will go mainstream in 2018 with the launch of Cannon Lake. The document also reveals Ice Lake will add even more AVX-512 functionality.
The addition of the AVX-512 to the future consumer CPUs is a good news for those who use such processors for things like video encoding, rendering or other applications that are common for workstations. Meanwhile, with the Ice Lake consumer chips, Intel is adding a deep learning-specific (AVX512_VNNI) 512-bit instructions as well as the NV-DIMM-oriented features such as CLWB, although immediate advantages for this market segment are unclear.
More details as well as a run-down of the benefits of these new instructions can be read at AnandTech. Besides the AVX-512 instructions, Cannon Lake and Ice Lake will also have a couple of other instruction sets to improve security and performance. By making this information public before the launch of these chips, Intel is giving software developers the opportunity to develop software in advance.