Intel Tiger Lake to have a lot more L2 cache?

Geekbench database entries of Intel Tiger Lake engineering samples reveal that these new chips seem to have a new cache structure. With the introduction of the Skylake-based HEDT and enterprise multi-core processors, Intel rebelanced the cache to have more of the fast L2 cache and less of the slower shared L3 cache. It seems Tiger Lake will introduce a somewhat similar cache rebalancing for its desktop and mobile processors.

If the GeekBench readouts are accurate, the Tiger Lake-Y mobile parts wil have more L1D (data) cache, a 400 percent increase in L2 cache, and a 50 percent increase in L3 cache:

According to this listing, assuming Geekbench is reading the platform correctly; the "Tiger Lake-Y" processor features a 4-core/8-thread CPU, with a massive 1,280 KB (1.25 MB) of L2 cache per core, and 12 MB of L3 cache. Intel also enlarged the L1D (data) cache to be 48 KB in size, while the L1I (instruction) cache remains 32 KB. This amounts to a 400% increase in L2 cache size, and a 50% increase in L3 cache size. Unlike with "Skylake-X," the increase in L2 cache size doesn't come with a decrease in shared L3 cache size (per core).

Via: TechPowerUp