China's biggest semiconductor foundry expects it will be able to offer its 7nm-class N+1 process for small scale production in Q4 2020. According to the Chinese chip foundry, its 7nm N+1 node will have 20 percent higher performance, 57 percent lower power consumption, a 63 percent reduction in logic area, an a 55 percent reduction in SoC area versus its 14nm FinFET process.
[SMIC co-CEO] Dr. Liang confirmed that the N+1 7 nm node and its immediate successor will not use EUV lithography. N+1 will receive a refinement in the form of N+2, with modest chip power consumption improvement goals compared to N+1. This is similar to SMIC's 12 nm FinFET node being a refinement of its 14 nm FinFET node. Later down its lifecycle, once the company has got a handle of its EUV lithography equipment, N+2 could receive various photomasks, including a switch to EUV at scale.
SMIC introduced its 14nm process in 2019. We don't know exactly how SMIC's 7nm node compares to what's offered by TSMC, world's largest foundry. SMIC is still behind its larger rivals but seems to be closing the gap.