It's also possible that this GDDR5 mode could be implemented alongside a DDR3 main memory pool. It's possible that future versions of the Kaveri APU might implement 2x 64-bit DDR3 channels alongside 2x 32-bit GDDR5 channels, with the latter serving as a framebuffer for graphics operations. (AMD references 32-bit controllers at one point in the documentation, which is why this seems to be the most likely configuration, given that four memory controllers are mentioned in Kaveri's spec).
AMD considered Kaveri with GDDR5
Posted on Monday, Jan 20 2014 @ 13:16 CET by Thomas De Maesschalck