Intel disables TSX in Haswell and early Broadwell chips due to stability fears

Posted on Tuesday, Aug 12 2014 @ 22:32 CEST by Thomas De Maesschalck
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News hit the wire that Intel is disabling the TSX instruction set in its Haswell processors and early builds of Broadwell due to a bug that can cause critical software failures. The TSX feature promises significant improvements in the performance of multithreaded applications but so far there's as good as no software available that takes advantage of this feature.

Intel has addressed the errata by deactivating TSX via a CPU microcode update that's delivered via new revisions of motherboard firmware. It doesn't happen a lot that such a significant flaw is discovered in a processor, the last time a processor bug caused much havoc was when AMD discovered the TLB erratum in its "Barcelona" processor. The TLB bug caused AMD to stop shipping its Opteron processors and resulted in a performance-decreasing microcode patch for the consumer Phenom CPUs.

The impact of the TSX errata isn't as severe as was the case with AMD's TLB bug. At first, TSX aims primarily at the server market and the present Xeon processor lineup relies on the older Ivy Bridge architecture, which lacks TSX entirely. The new Haswell-EP server processors are expected to ship with TSX disabled but the feature should be active in the future Haswell-EX generation.

For consumers the news means that TSX will no longer be supported by the current Haswell nor by the upcoming Broadwell Y-series. Intel has a fix in the works for Broadwell's next stepping and a future stepping of Haswell but there's no timetable available for this.

About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.

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