Intel has addressed the errata by deactivating TSX via a CPU microcode update that's delivered via new revisions of motherboard firmware. It doesn't happen a lot that such a significant flaw is discovered in a processor, the last time a processor bug caused much havoc was when AMD discovered the TLB erratum in its "Barcelona" processor. The TLB bug caused AMD to stop shipping its Opteron processors and resulted in a performance-decreasing microcode patch for the consumer Phenom CPUs.
The impact of the TSX errata isn't as severe as was the case with AMD's TLB bug. At first, TSX aims primarily at the server market and the present Xeon processor lineup relies on the older Ivy Bridge architecture, which lacks TSX entirely. The new Haswell-EP server processors are expected to ship with TSX disabled but the feature should be active in the future Haswell-EX generation.
For consumers the news means that TSX will no longer be supported by the current Haswell nor by the upcoming Broadwell Y-series. Intel has a fix in the works for Broadwell's next stepping and a future stepping of Haswell but there's no timetable available for this.