Intel pushes AIB as standard for linking of chiplets

Posted on Thursday, Jul 26 2018 @ 12:37 CEST by Thomas De Maesschalck
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Intel is finalizing the specifications of its Advanced Interface Bus (AIB), a physical-layer block for the die-to-die connection in the firm's Embedded Multi-Die Interconnect Bridge (EMIB). AIB is a intended as a royalty-free standard for linking chiplets using any packaging technique. The chip giant hopes AIB will result in an ecosystem of chiplets that it can tap for its own products.

AIB could be available within weeks if an existing consortium picks up the technology. Otherwise, if Intel needs to create a new consortium, the process could take up to six months.
Low-cost, dense packages like EMIB are becoming increasingly important techniques for delivering high performance chips at a time when traditional scaling is becoming more complex and costly. TSMC’s InFO, a rival approach, is used by the A-series processor in Apple’s iPhone.

Intel is keeping proprietary the secret sauce behind EMIB — the equipment and methods it uses to build simplified bridges between chips. However, it aims to make AIB a standard interface for linking chiplets using any packaging technique, hoping to spawn an ecosystem of parts it could tap for its own products.

Many others share the vision. “An Ethernet for chiplets is the most important goal for the CHIPS project” that Intel is part of, said Andreas Olofsson, program manager for the effort under the Defense Advanced Research Agency.
More details at EE Times.

About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.

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