Intel 10nm+ Tiger Lake wafer spotted at CES 2020

Posted on Tuesday, Jan 14 2020 @ 12:12 CET by Thomas De Maesschalck
Last week at Computex, AnandTech got its hands on a 10nm+ Tiger Lake wafer from Intel. Tiger Lake will have a higher CPU and graphics performance level than Ice Lake and is expected to hit the market by the end of this year.

The site counted the number of dies on the wafer shown at CES 2020, it contains 22 dies in one direction and 28 dies in the other. After some calculations this works out to a die size of around 146.10mm² and a closeup of the wafer reveals each die has four cores. Based on its photos, AnandTech also believes the rumor of Tiger Lake having Xe graphics with 96 EUs is true.
So here you have it. Here’s what we know about Intel’s Tiger Lake CPU:

  • Four Cores, Likely updates to the Sunny Cove microarchitecture found in Ice Lake (Willow Cove?)
  • Xe-LP Graphics, 96 EUs confirmed
  • 146.1 mm2 die size
  • 10+ nm process node (non-EUV)
  • Enhanced DL-Boost Support (AVX-512, VNNI, Xe Graphics, GNA 2.0)
  • Thunderbolt 4 Support
  • Intel Tiger Lake wafer at CES


    About the Author

    Thomas De Maesschalck

    Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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