Posted on Wednesday, May 26 2021 @ 14:16 CEST by Thomas De Maesschalck
PCI-SIG expects it will publish the final PCI Express 6.0 specification by the end of this year. That's around the same time we'll see the first consumer hardware with PCI Express, as Intel's Alder Lake-S is expected to be the first with PCI Express 5.0 support sometime in Q4 2021.
New in PCI Express 6.0
AnandTech has an overview of what's new in PCI Express 6.0
over here. Compared with PCI Express 5.0, the bandwidth will double to 64GT/s. PCI-SIG is pretty excited about PCI Express 6.0 and claims it's as big an update as PCI Express 3.0 was versus PCI Express 2.0.
Ultimately, all of this is to say that PCIe 6.0 remains on track for its previously-scheduled 2021 release. After draft 0.9 lands, there will be a further two-month review for any final issues (primarily legal), and, assuming the standard clears that check, PCI-SIG will be able to issue the final, 1.0 version of the PCIe 6.0 specification.
In the interim, the 0.9 specification is likely to be the most interesting from a technical perspective. Once the updated electrical and protocol specs are approved, the group will be able to give some clearer guidance on the signal integrity requirements for PCIe 6.0. All told we’re not expecting much different from 5.0 (in other words, only a slot or two on most consumer motherboards), but as each successive generation ratchets up the signaling rate, the signal integrity requirements have tightened.
The slide below shows everything that's new:
