Intel Xeon MP Tulsa details

Posted on Friday, February 10 2006 @ 2:52 CET by Thomas De Maesschalck

Here's some basic information on Intel's upcoming Xeon MP Tulsa:

65nm
435mm2 die size
1.328B transistors
Dual Core, 4 threads
2 x 1MB L2, 16MB shared L3 cache
1.25V / 150W TDP
667/800MHz 3-load FSB
Support for VT, DBS & Pellston
Part of Truland Platform

More info over at VR-Zone.

About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.

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