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More AMD Barcelona processor details

Posted on Tuesday, February 13 2007 @ 01:12:27 CET by

The Inq has a few tidbits more information about the quad-core Barcelona CPU from AMD:
The first thing that Barcelona adds is a very much more flexible clocking scheme for the cores. There are PLLs for each core now, so they can be clocked independently. With the older K8 chips, all cores had to go up or down together regardless of load.

With Barcelona/K10, each core can change speed as needed potentially saving a lot of power. The only problem is that they can not vary voltage independently on each core so more power is consumed than necessary. Put this down for a future to do list. The voltage is set by the most loaded core, so it can ramp down quite a bit on really light loads.

More interesting is the memory controller power savings. New to K10 is the ability to manage DDR channel power. If K10 sees that memory is using only writes, it can shut down read channels. If it is only reading, it can shut down write channels. This again saves a chunk of wattage.



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