 |
|
Who's Online
|
There are currently 129 people and 0 DV-member(s) online.
|
|
|
|
|
RSS
|
 |
|
|
|
| |
Intel 45nm E-0 stepping changes unveiled
| |
Posted on Saturday, May 31 2008 @ 03:20:31 CEST by Thomas De Maesschalck |
This summer Intel will move some of its 45nm processors to the new E-0 stepping, this includes the Xeon 3110, Core 2 Duo E8400 and E8500. TC Mag has some info on what's new in the E-0 stepping:
- New SSpec and MM numbers
- CPUID will change from 0x10676 to 0x1067A
- Power Status Indicator (PSI) is supported
- PECI implementation change
- New instructions added - XSAVE/XRSTOR
- New ISA extension for save/restoring context of x87, SSE, and future processor state
- New feature added - ACNT2
- Improved mechanism for determining processor utilization. To be used for more efficient P-state determination.
- Package change to Halide free package
|
| |
|
|
| | The comments are owned by the poster. We aren't responsible for their content. |
|
|
|
|
