Last week JEDEC announced Low Voltage DDR3L specification, this type of DDR3 memory runs at 1.35V and enables power savings of 20% in many mainstream applications.
Improvements in silicon production processes have
enabled a reduction in the core and I/O voltage for an incremental improvement in
DDR3. Called “DDR3L” for Low Voltage, the new devices will operate from a single
1.35V rail, compared to the 1.5V of existing devices, resulting in a power savings of
20% in many mainstream applications. As many computing systems work to meet
growing demand for green technologies, this savings is a breath of fresh air.
These devices are intended to be compatible with existing 1.5V DDR3 systems and
may operate without restriction in those applications. All JEDEC standard DDR3
memory modules include a Serial Presence Detect (SPD) device, an EEPROM
readable over an SMbus, that informs the host system of the capabilities and
characteristics of the module, including the supported supply voltages, so that system
designs can be aware of and take advantage of the new DDR3L devices. The standard
for module labels has been updated for consistency as well, with “PC3L” indicating
end-user modules such as personal computers, and “EP3L” for modules targeted at
“This announcement is consistent with trends in the industry to gracefully migrate
mainstream devices to lower power as new fabrication geometries permit the lower
supply voltages,” said Joe Macri of AMD, chairman of the JC-42.3 memory committee.
“This committee intends to continue evaluating proposals for further VDD reductions in
the future, possibly 1.25V or even lower. We hope that System designers will consider
making their system designs flexible to take advantage of lower VDD options in the