The dual-core chips that AMD and Intel plan to bring to market next year won't be sharing their memories.
A version of Opteron coming in 2005 and Montecito, a future member of Intel's Itanium family also slated for next year, will both have two processor cores, the actual unit inside a processor that performs the calculations, and each core will have separate caches, pools of memory integrated into the chip for rapid data access, according to company presentations at the Hot Chips conference at Stanford University.
Each core of Montecito, for instance, will come with a 1MB level two cache and a 12MB level three cache, according to Cameron McNairy, a researcher at Intel. To date, Intel has mostly said that Montecito's level 3 cache will contain 24MB of memory.
