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Qimonda tapes out smallest 2Gb DDR3 chips

Posted on Thursday, November 06 2008 @ 03:25:58 CET by

Qimonda reports it has commenced commercial products of DRAM chips with its new Buried Worldline technology. The firm also says it has taped out what it believes is the world's smallest 2Gb DDR3 memory chip based on this technology.
Qimonda AG (NYSE:QI), a leading global memory supplier, today announced the commencement of commercial production of DRAM chips using its new Buried Wordline technology. Qimonda’s revenues in October included the first sales of 1Gbit DDR2 chips using 65nm Buried Wordline technology. In addition, Qimonda has achieved first yields on the next generation 46nm Buried Wordline technology and has taped out what it believes is the worldwide smallest 2G DDR3 chip based on this technology. Qimonda’s innovative Buried Wordline DRAM technology combines high performance, low power consumption and small chip sizes to further advance the company’s product portfolio, which is now focused on DRAM for infrastructure and graphics applications.

“With the start of commercial production of our 65nm Buried Wordline technology, we have achieved a major milestone on our new technology roadmap,” said Kin Wah Loh, President and CEO of Qimonda AG. “We have increased wafer starts for 65nm Buried wordline at our lead fab in Dresden to several hundred wafers per month and plan to convert additional capacities in the coming months. The 65nm process demonstrated high yields and we have received very positive feedback from the customers that had received samples, especially regarding the low power consumption feature of our new Buried Wordline technology. In addition we have achieved first yield on our next generation 46nm Buried Wordline technology ahead of schedule and are well on track to start mass production by mid 2009. Offering more than twice the number of bits compared to the 65nm technology, the introduction of our 46nm technology will be a major step towards our goal of technology leadership in manufacturing.”

Qimonda had introduced a new technology roadmap and first functional samples based on its innovative Buried Wordline architecture in February 2008. The Buried Wordline architecture combines the power-saving benefits of Qimonda’s historical trench technology with a standard stack capacitor widely used in the DRAM industry. Qimonda’s innovative Buried Wordline concept draws on Qimonda’s experience in etching and filling structures in the silicon wafer, and represents a breakthrough in the field of DRAM cell technology on the way to achieving fully vertical cells. In addition, Buried Wordline technology supports a cell size reduction down to only 4F² (meaning a cell surface area equal to only four times the minimum feature size on the chip). The first generation 65nm Buried Wordline technology already reduces the cell size to 6F² compared to 8F² for the 75nm technology currently in volume production at Qimonda. Combined with the smaller feature size, the 65nm technology increases the number of bits per wafer by more than 40 percent compared to the 75nm trench technology. The 46nm technology with 6F² cell sizes potentially offers more than twice the number of bits per wafer compared to the 65nm Buried Wordline technology – an improvement of 200 percent as compared with the 75nm node.

A part of the development of the Buried Wordline technology was supported within the scope of technology development by the EFRE fund of the European Community and by funding of the State Saxony of the Federal Republic of Germany.



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