Intel Core Microarchitecture features

Posted on Tuesday, Mar 07 2006 @ 22:15 CET by Thomas De Maesschalck
Here is a list of some of the new features of Intel's Core processor architecture, this architecture will follow up the current NetBurst generation:
  • Intel Wide Dynamic Execution –– Delivers more instructions per clock cycle, improving execution and energy efficiency. Every execution core is wider, allowing each core to complete up to four full instructions simultaneously using an efficient 14–stage pipeline.

  • Intel Intelligent Power Capability –– Includes features that further reduce power consumption by intelligently powering on individual logic subsystems only when required.

  • Intel Advanced Smart Cache –– This includes a shared L2 cache to reduce power by minimizing memory traffic and increase performance by allowing one core to utilize the entire cache when the other core is idle.

  • Intel Smart Memory Access –– Yet another feature that improves system performance by hiding memory latency and thus optimizing the use of data bandwidth out to the memory subsystem.

  • Intel Advanced Digital Media Boost –– Now all 128–bit SSE, SSE2 and SSE3 instructions execute within only one cycle. This effectively doubles the execution speed for these instructions which are used widely in multimedia and graphics applications.


  • About the Author

    Thomas De Maesschalck

    Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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