How HyperTransport could solve FSB headaches

Posted on Friday, April 14 2006 @ 11:10 CEST by Thomas De Maesschalck
The Inquirer talks about how an interconnect like HyperTransport 3.0 could solve some of the problems that Intel has.
Now, there was chat about throwing away that FSB and using an interconnect like, let's say, HyperTransport 3.0, on the new Intel Core, and what it would bring to the table. Here's my take on the situation.

Intel likes the idea of being able to instantly double the per-socket core density by having the single-die or dual-die option in the same socket. With their MCM substrate expertise since the Pentium Pro days, and good yields and frequency characteristics of the Presler XE (which is a dual-die MCM), it makes sense to use this trump card - on top of the ability to mix 'n' match even dies from different wafers on that one MCM, depending on individual die test results, to get maximum-speed high-end eXtreme Edition high-margin parts.
More details over at The Inquirer.

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