Since Intel will have moved the memory controller and the integrated graphics into the CPU by now, there's no longer any need for an MCH and an ICH, so Intel has simplified its chipset design to keep cost down in the entry-level and mainstream segments. The chipset interfaces with the CPU via Intel's aging DMI interconnect, which seems quite odd at first, but when you consider that the PCIe 2.0 controller is built into the CPU, this might not be an issue.Havendale is a desktop processor while Auburndale will be used in notebooks. Both CPUs are dual-core, with 4MB shared cache, integrated dual-channel DDR3 memory controller and integrated graphics. Intel claims these new integrated graphics will perform ten times better than their current IGP solutions.
The PCH will house things like eight PCIe lanes, support for up to four PCI slots, the Gigabit Ethernet MAC, display interface controllers, I/O controllers, RAID and SATA controllers, USB 2.0 controller etc. This is pretty much what the ICH is doing today bar a few exceptions such as the display interface controller. The reason why this is in the chipset and not in the CPU, is because it has to physically connect to the ports on the motherboard.
Intel Foxhollow platform unveiled
Posted on Wednesday, Nov 28 2007 @ 16:20 CET by Thomas De Maesschalck