Intel talks about Larrabee, Ray Tracing

Posted on Friday, Feb 22 2008 @ 01:10 CET by Thomas De Maesschalck
Intel talked about its Larrabee project and ray tracing at the GDC conference:
During a very interesting presentation by Daniel Pohl of Quake 4: Ray-Trace fame, The L-word (not the TV show Lost for those of you stuck in a cave for the past few years) was not just mentioned, but a slide was published for world to see.

As you can see now, Intel is using all of resources from the Folsom Prison, Houston bull-riding bar to a Biergarten in Braunschweig to get the chip done. Given the fact that description calls for “highly parallel, programmable architecture” that is targeting “Scientific Computing, Recognition Mining & Synthesis, Financial Analytics, Health applications and Graphics”, it is not a very hard thing to guess what Intel is working on - a cGPU, GPGPU chip that is set to start its life with a 12 mini-core setup, that will expand to 16 and 24 mini-cores in the future. We hope that putting huge-ass cache (4MB) in the chip is going to solve the branching issues that GPU chips have today.

Oh yeah, it is supposed to be a great chip for IntelRT, or simply - great for Ray-Tracing. If all things go as planned, silicon should be done by year's end, and the release date should be by the end of 2009, probably 2010. frame.
Source: TG Daily


About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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