AMD's dual-core AMD64 processors will support instruction compatible with Intel's SSE3 technology. The SSE 3 instructions were introduced with the 90nm Intel Pentium 4 codenamed Prescott in February 2004.
AMD's 64-bit processors support the original Streaming SIMD Extensions and SSE 2 through updates to the company's 3DNow! technology, but this is the first indication that the chips are to gain SSE 3 support.
However, the Opteron will offer only ten of the 13 SSE 3 instructions. Which three are not to be implemented - or may already be part of 3DNow! - is not known.
Since the dual-core Opteron is based on AMD's 90nm Opteron, it's possible that this part, which is due to ship shortly, will also support SSE 3, as may the 90nm Athlon 64.
AMD's Forum presentation also revealed the dual-core Opteron, which the company has already said is due to ship mid-2005, will contain 205m transistors. Its 90nm fabrication means that together, the two cores and ancillary circuitry will take up no more space than a 130nm single-core Opteron.
The upcoming chip, which will have a 940-pin interface, will have a 95W power envelope.
The two cores will run in a symmetric multiprocessing mode, so that operating systems see them as two different processors. It's not clear yet whether they will also be able to operate asymmetrically, in order to run two operating systems, one per core, or two separate instances of the same OS.
This is going to be one of the features of Freescale's upcoming e600-based dual-core PowerPC chip. And it might also be the base of Intel's upcoming Silvervale and Vanderpool technologies.