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New JMicron controller and 32nm NAND flash to lead to big SSD price drops

Posted on Wednesday, May 27 2009 @ 00:03:04 CEST by


JMicron will soon unveil the JMF612 controller for solid state disks, this chip uses an ARM9 core and will support up to 256MB DDR or DDR2 DRAM as external cache. The new controller is designed for 32nm NAND flash, it uses eight memory channels to access its storage and won't have the stuttering problem that plagued the JMF602 controller.

The first samples will be presented at Computex next week and mass production is slated for July. DailyTech reports the use of this new JMicron controller and 32nm NAND flash memory could cut solid state disk prices in half by the end of the year.
SSDs using the chip will also be able to support Native Command Queuing (NCQ), which was designed to increase performance of SATA hard disks by allowing the drive to internally optimize the order in which read and write commands are executed. NCQ is used in SSDs when there is latency due to high CPU usage. It also supports 128-bit Advanced Encryption Standard (AES) protocols for full disk encryption. This provides data security mandated for classified and/or privileged information in government and corporations.

While most drives using the new chip will be designed for its SATA II interface in mind, it does have a USB 2.0 interface for data transfers and firmware updates. The JMF612 has an ARM9 embedded processor with 32KB of ROM and 128KB of RAM at its core. Data integrity is provided by BCH ECC in hardware, with the ability to correct up to 24 random bit errors per 1024 bytes. Dynamic and static wear leveling technologies, along with updated bad block management software help to ensure long life of the drive.
JMicron is also preparing a controller for Serial ATA III (6Gbps) SSDs but that chip won't be ready until mid-2010.


 



 

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