Posted on Thursday, October 22 2009 @ 20:41 CEST by Thomas De Maesschalck
Bright Side of News
reports ARM revealed details about its next-generation 32nm and 28nm low power (LP) mobile SoC designs at ARM Techcon03 in Santa Clara, California.
The ARM Techcon03 conference in Santa Clara, California - opened with nearly two hour session about optimizing the ARM IP for next-generation, 32/28nm LP [low power] mobile SoC [silicon on a chip] designs. The Common Platform [IBM, Chartered Semiconductor Manufacturing and Samsung Electronics] Alliance and ARM explained physical and processor IP and tool/flow solutions for the Common Platform’s 32nm/28nm high-k metal-gate [HKMG] process technology.
One of the more interesting slides showed 10 samples of ARM's 32nm evolution. A year ago the ARM Cortex-M3 was the first test chip. Over the months, eight more examples were tested [taped out, tested, analyzed]. In August, the first 28nm test chips showed up. They gave invaluable insight into the trade-offs when reducing from a 40nm fab process. This month ARM and the Common Platform Alliance begun working on optimizing the Cortex IP for the processes at hand.
