Intel continues to keep its nose to the grindstone on its re-positioned Itanium microprocessor, with a number of introductions of upgrades slated for this year. The chip company will introduce an Itanium 2 with 9MB of cache in the third quarter and using the 667MHz front side bus (FSB), according to recent roadmaps seen by the INQ.
More info at The Inquirer
Intel's dual-core Montecito planned for Q4 2005
Posted on Monday, January 24 2005 @ 19:12 CET by Thomas De Maesschalck