A presentation by Paolo Gargini, Intel's technology strategy director, at the Industry Strategy Symposium Europe, held in Dublin, Ireland, earlier this week, revealed some information about Intel's future semiconductor plans. Gargini said his company may use III-V materials in 2015 as a transistor option that could deliver three times the performance of silicon at the same power consumption, or deliver the same performance at one-tenth the power consumption.
Gargini, also chairman of the International Technology Roadmap for Semiconductors (ITRS), said in the presentation that the inclusion of III-V materials is a 2015 transistor option that could deliver either three times the performance of silicon at the same power consumption, or deliver the same performance as silicon at one-tenth the power consumption. However, integration of a thin compound semiconductor transistor channel with conventional silicon manufacturing would be the key to adoption.
While exceptional progress has been made in silicon to get to 32-nm, Gargini indicated in his slides that progress is coming only with more and more complicated additions to the basic silicon manufacturing process, such as the increased amounts of strain necessary to increase the electron mobility above its natural value; and the possible use of 3-D structures such as FinFETs.