By 2007 Intel plans to use a common high-speed serial interconnect (CSI) as the processor bus for its Xeon and Itanium processors. The CSI interconnect will be a competitor to AMD's HyperTransport bus. The company also plans to embed a memory controller, just like AMD did with their 64-bit processors.
Intel has not yet decided whether it will make CSI an open standard. The final specification for the interconnect is still being hammered out by engineers working with the server CPU design teams, according to a source close to the project.