Analysis of Intel's Poulson Microprocessor at RWT

Posted on Friday, May 27 2011 @ 14:56 CEST by Thomas De Maesschalck
David Kanter from RealWorldTech analyzed Intel's Poulson architecture, you can read the analysis over here.
Poulson is a radical departure from the initial Itanium philosophy, and takes into account years of experience, and technology and market changes. Intel abandoned the idea of simple hardware controlled by the compiler and Poulson is the first dynamically scheduled Itanium design, with modest out-of-order execution.

We estimate that the 8-core 32nm Poulson could increase performance by 2.4-2.8X over previous generations, by virtue of a better processor pipeline, and more sophisticated multi-core and multithreading architecture. The performance and energy efficiency will be a tremendous improvement for the Itanium line, and HP's servers in particular will benefit. While Poulson will not exceed IBM’s POWER line, it should handily beat the SPARC competition from Oracle and Fujitsu. Of course, all three face renewed competition from x86 designs such as Westmere-EX.


About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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