Poulson is a radical departure from the initial Itanium philosophy, and takes into account years of experience, and technology and market changes. Intel abandoned the idea of simple hardware controlled by the compiler and Poulson is the first dynamically scheduled Itanium design, with modest out-of-order execution.
We estimate that the 8-core 32nm Poulson could increase performance by 2.4-2.8X over previous generations, by virtue of a better processor pipeline, and more sophisticated multi-core and multithreading architecture. The performance and energy efficiency will be a tremendous improvement for the Itanium line, and HP's servers in particular will benefit. While Poulson will not exceed IBM’s POWER line, it should handily beat the SPARC competition from Oracle and Fujitsu. Of course, all three face renewed competition from x86 designs such as Westmere-EX.
Analysis of Intel's Poulson Microprocessor at RWT
Posted on Friday, May 27 2011 @ 14:56 CEST by Thomas De Maesschalck