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OCZ: Triple-bit-per-cell SSDs to be significantly cheaper

Posted on Monday, November 07 2011 @ 21:13:20 CET by


OCZ CEO Ryan Petersen talked about triple-bit-per-cell (TPC) NAND flash based solid state disks at last week's Needham HDD and memory conference. Petersen said these disks should arrive next year, with prices significantly lower than those of MLC-based SSDs. The downside however is the much lower redundancy of TLC flash memory, but according to Petersen this should not be a problem for the low-end servers, consumers, laptops, and retail sub-segments.
"We announce [the intention to ship] TLC-based drives! [...] People have been talking about [TLC-based SSDs] for a long time and we have now put ourselves with next-gen [Indilinx Everest] controller, which we are shipping in January, and position it for low-end servers, consumers, laptops, retail; those sub-segments that really can adopt TLC-based solutions. This is really where we can get over four years of life [of SSDs]," said Ryan Petersen, chief executive officer of OCZ at the Needham HDD and memory conference.

Triple-bit-per-cell (3bpc) NAND flash is relatively cheap in manufacturing, but its redundancy is dramatically below that of multi-layer cell [MLC, 2bpc]: around a 1000 writes (for TLC) versus 10000 writes (for MLC) and simply cannot be compared to the number of write cycles for SLC [single layer per bit] which are around 100 000.
Source: at X-bit Labs



 



 

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