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Intel Xeon Phi binary incompatible with AMD64

Posted on Friday, July 13 2012 @ 22:46:33 CEST by


Bright Side of News analyzed Intel's Xeon Phi and reports that even though the HPC product supports the x86 instruction set and programming model, binary software compatibility seems improbable. Full details over here.
As a consequence of these architectural changes, binary software compatibility is improbable. At the very least, it is required to recompile software to be able to run on Larrabee. Depending on the actual implementation of software one may want to run on Intel's MIC, it might also be necessary to put in some reengineering effort. Just to put it into perspective, Intel is throwing out over 15 years of x86 CPU innovations in this case. Handwritten SIMD code is basically worthless on Larrabee. This means that any HPC applications that rely on SIMD optimizations have to dedicate effort to rewriting portions of their code.

On the other hand, code written and compiled for Larrabee is not compatible with all the other x86 CPUs out there, since the use of the new vector instructions is necessary to extract any meaningful performance out of Larrabee. At this point it is unknown whether these will be included in future Intel CPUs aimed at servers/desktop/notebook/etc. The only exception to both of these hard rules is code that uses only basic x86 instructions or their 64-bit equivalents.

Intel even acknowledges this issue in a blog aimed at developers, but strains that this should mostly affect tools developers: “This combination of Linux, 64-bits, and new vector capabilities with an Intel® Pentium® processor-derived core, means that Knights Corner is not completely binary compatible with any previous Intel processor.”




 



 

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