TSMC makes its first 16nm FinFET networking processor

Posted on Friday, September 26 2014 @ 12:37 CEST by Thomas De Maesschalck
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TSMC announced it has successfully produced the company's first fully functional ARM-based networking processor on a 16nm FinFET process. Volume production on the new process is expected to kick off in Q1 2015.
TSMC (TWSE: 2330, NYSE: TSM) today announced that its collaboration with HiSilicon Technologies Co, Ltd. has successfully produced the foundry segment’s first fully functional ARM-based networking processor with FinFET technology. This milestone is a strong testimonial to deep collaboration between the two companies and TSMC’s commitment to providing industry-leading technology to meet the increasing customer demand for the next generation of high-performance, energy-efficient devices.

TSMC’s 16FinFET process promises impressive speed and power improvements as well as leakage reduction. All of these advantages overcome challenges that have become critical barriers to further scaling of advanced SoC technology. It has twice the gate density of TSMC’s 28HPM process, and operates more than 40% faster at the same total power, or reduces total power over 60% at the same speed.

"Our FinFET R&D goes back over a decade and we are pleased to see the tremendous efforts resulted in this achievement,” said TSMC President and Co-CEO, Dr. Mark Liu. “We are confident in our abilities to maximize the technology’s capabilities and bring results that match our long track record of foundry leadership in advanced technology nodes.”

TSMC’s 16FinFET has entered risk production with excellent yields after completing all reliability qualifications in November 2013. This paves the way for TSMC and customers to engage in more future product tape-outs, pilot activities and early sampling.

Built on TSMC’s 16FinFET process, HiSilicon’s new processor enables a significant leap in performance and power optimization supporting high-end networking applications. By leveraging TSMC’s production-proven heterogeneous CoWoS® (Chip-on-Wafer-on-Substrate) 3D IC packaging process, HiSilicon integrates its 16-nanometer logic chips with a 28-nanometer I/O chip for a cost-effective system solution.

"We are delighted to see TSMC’s FinFET technology and CoWoS® solution successfully bringing our innovative designs to working silicon,” said HiSilicon President Teresa He. “This industry’s first 32-core ARM Cortex-A57 processor we developed for next-generation wireless communications and routers is based on the ARMv8 architecture with processing speeds of up to 2.6GHz. This networking processor's performance increases by three fold compared with its previous generation. Such a highly competitive product can support virtualization, SDN and NFV applications for next-generation base stations, routers and other networking equipment, and meet our time-to-market goals.”


About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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