A bunch of new information about Intel's Skylake processor architecture was outlined at the IDF in San Francisco. The new chip features higher IPC performance and better power efficiency, and comes DDR4 support, a new graphics architecture with DX12 support and new eDRAM configs, and integrated camera ISP. One of the unique aspects of Skylake is how widely it can be used, it scales from 4.5W for tablets and ultralight systems to up to 95W for desktop PCs. A brief discussion of the new features and a collection of the slides from Intel can be viewed at HotHardware.
To put all of this more simply, Skylake can have more instructions in flight at any given time, IPC performance has been increases through cache and front end optimizations, and power efficiency has been improved as well. In fact, Skylake will scale all the way down to 4.5 watts and up to 91 watts.
A more in detailed discussion of the aspects that make Skylake faster and more efficient can be read at ARS Technica. On the power consumption side, one of the most significant new features is Speed Shift Technology. This feature puts much more control over power management in the hands of the processor, making it far more responsive than before:
This makes power management far more responsive. The old way was relatively slow; it takes about 30 milliseconds for the processor to inform the operating system that something has happened (the workload has gone up, the system is getting too hot, etc.) and for the operating system to then respond (increase the frequency to handle the workload, reduce the frequency to reduce power draw). In the new system, that time is cut to about 1 millisecond. This means that the processor is both quicker to react to new work, boosting the frequency as needed, but also much quicker to cut the frequency when idle. Skylake processors will pick the most efficient frequency to run at, without needing operating system oversight. They'll also be able to go as slow as 100MHz if that's all that's needed.
Skylake also offers duty cycling, this will make the chip switch between its most efficient frequency and the C6 power state. Processors conserve energy by lowering the frequency, because power consumption is proportional to the square of the frequency. However, once the frequency has dropped below a certain point further reductions in frequency do not save power because other things such as leakage start to dominate. In fact, further reducing the frequency can lead to higher power consumption because the calculations take longer to complete. Therefore, Skylake will stop frequency throttling at its most efficient frequency and cut power usage further by cycling between this frequency and the C6 power state.
More details about Skylake will be released later today.