Intel's power-optimized processor architecture

Posted on Tuesday, August 23 2005 @ 23:32 CEST by Thomas De Maesschalck
Intel's next-generation microprocessor architecture will be a unified architecture, combining the best of the Pentium 4 NetBurst with the Pentium M Banias architecture. Easy said, the next-gen power-optimized architecture from Intel combines the FSB and 64-bit capabilities of NetBurst with the power saving features of the Pentium M. Of course new features like virtualization and security are also a part of this architecture;

And contrary to rumours, Intel's new architecture will still feature an Out of Order execution core.
The core will be a wider 4-issue core (4-issue decode, execute and retire) with deeper buffers, presumably with more instructions in flight than the Pentium 4 courtesy of the 4-issue core.
While the Prescott pipeline is 31+ stages long, Intel said the new architecture will only be 14 stages long. This will decrease power consumption (and clock speed as well), while boosting performance significantly. It's expected the upcoming processors will be able to run as high as 3GHz, which is a bit higher than AMD's Athlon 64s.

The chip giant further claimed at IDF the Conroe desktop processor will deliver a 5x improvement in performance per watt over the current Pentium 4 architecture. The new architecture will also feature a shared L2 cache between the cores and there will be a higher "relative" increase in L2 cache bandwidth. Intel also added a direct L1-to-L1 cache transfer system to improve the currently very poor cache-to-cache transfer performance of its dual-core processors.
There are also a number of new prefetching algorithms, allowing data to be prefetched from L1 to L1 (one core to another), L1 to L2, etc... Intel is also introducing speculative data loads with the new architecture, loads to be executed ahead of stores if a dependency is predicted to not exist between the two. We are waiting for more details on the feature to be exact about its functionality.
Merom (mobile) and Conroe (desktop) will both be dual-core processors. Intel said Conroe will be available in multiple L2 cache sizes, while Merom will not. The version with additional L2 cache may be a new product like the Extreme Edition of the current Pentium 4 processors.

And for servers Intel has prepared the dual-core Woodcrest which will be followed by the quad-core Whitefield CPU. Check out all slides at AnandTech

About the Author

Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.

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