Today's announcement is the next major milestone in the Cell project, which began with the formation of the STI (Sony Group, Toshiba and IBM) Cell Design Center in Austin, Texas in March of 2001. High level technical specifications were released in much-anticipated papers delivered at San Francisco's International Solid State Circuit Conference (ISSCC) in February 2005.
By opening up a wide set of detailed technical specifications to software developers, business partners, academic and research organizations, and potential customers, IBM, Sony Group and Toshiba continue their work to aggressively stimulate the creation of Cell-based applications. The goal: establish a thriving community of interest and innovation around Cell, allowing all interested parties to rapidly evaluate and utilize Cell technology.
Specifically, the companies will make available documents describing the following components of the Cell microprocessor:
The Cell Broadband Engine Architecture -- defines a processor structure directed toward distributed processing and multimedia applications. The architecture contains a control processor based on the Power Architecture, augmented with multiple high-performance SIMD Synergistic Processor Units and a rich set of DMA commands for efficient communications among processing elements. The Synergistic Processor Unit Instruction Set Architecture (SPU ISA) -- discloses the high performance SIMD RISC processor designed to accelerate media and streaming applications for systems based upon the Cell Broadband Engine Architecture. Synergistic Processor Unit C/C++ Language Extensions, Application Binary Interface, and Assembly Language specifications -- which aid software developers in unleashing the full processing power of the SPUs.