Intel refuses to share Skylape-SP die shots and transistor counts

SemiAccurate published an analysis of how the Skylake-SP architecture diverges from the consumer versions. Lots of interesting stuff in there, including the observation that Intel is no longer sharing die shots or transistor counters.

When asked about this, Intel replied that it's no longer providing these details to the press as its Technology Manufacturing Group (TMG) and Data Center Group (DCG) consider this information proprietary to Intel's business operation.

However, SemiAccurate speculates the most probably reason is that Skylake-SP is far bigger than Intel would like it to be, as there are little other reasons to keep this information secret:

The last option is the least happy spin, namely that the die is much bigger than Intel wants it to be. Since die size is one of the major contributors to a device’s cost, it matters a lot. Skylake-SP is late and slipping, the fully debugged Purley is now called Cascade Lake and will come some time next year. Silicon ages about as well as fish and Purley is getting quite ripe. Age also equates to performance, the later a project is, the higher it has to perform to keep up with expectations. This too has a bearing on ASPs, just ask AMD of old about how well some of their late server chips fared in the market.