
The update from stepping E-0 to G-1 will add the LAHF and SAHF instructions, which EM64T currently lacks. The reason for this is because AMD added the two instructions to its 64-bit specification after the Intel engineers used it to create EM64T.
These two instructions are used to copy information back and forth between the chip's status flags and its AH register.
These 100% AMD64 compatible Xeons will sample on October 17 and should be available on November 28. Pentium 4 5x1 processors with full AMD64 compatibility will sample on the same date and will retail on November 14. The Pentium 6x1 will likely get an update too.