Posted on Tuesday, November 13 2018 @ 10:42 CET by Thomas De Maesschalck
AnandTech had the opportunity to interview AMD CTO Mark Papermaster about the firm's future roadmap. In the interview, Papermaster talks about the needs of the datacenter of the future, the improvements made in the upcoming EPYC "Rome" processor, the advantages of Infinity Fabric, and the manufacturing side of things.
IC: AMD has had a strong relationship with TSMC for many years which is only getting stronger with the next generation products on 7nm, however now you are more sensitive to TSMC’s ability to drive the next manufacturing generation. Will the move to smaller chiplets help overcome potential issues with larger or dies, or does this now open cooperation with Samsung given that the chip sizes are more along the lines of what they are used to?
MP: First off, the march for high performance has brought us to Zen 2 and the ability to leverage multiple technology nodes. What we’re showing with Rome is a solution with two foundries with two different technology nodes. [7nm chiplets made by TSMC, and a 14nm I/O die made by GlobalFoundries] It gives you an idea of the flexibility in our supply chain that we’ve built in, and gives you explicit example of how we can work with different partners to achieve a unified product goal. On the topic of Samsung, we know Samsung very well and have done work with them.
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