Posted on Tuesday, Jan 29 2019 @ 12:55 CET by Thomas De Maesschalck
In an interview with The Korea Herald, SK Hynix DRAM design research fellow Kim Dong-kyun shed some light on
the future of the DRAM market. First up, he said the upcoming DDR5 memory could be a more reliable solution for automotive applications because of its ability to correct errors. Besides integration of ECC technology into the memory chip, DDR5 will also boost the bandwidth. Initially, DDR5 is expected to start at 5200MHz but this is expected to increase to 6400MHz by 2022.
Mass production of DDR5 is expected to start next year.
“Because quality is the most important issue in automobiles, it is imperative that automotive memory chips have the ECC,” Kim said in an interview with The Korea Herald. “The ECC technology has been adopted by our company’s DDR5 that will be more reliable for the growing automotive memory market.”
Technological specifications for the ECC had not been defined by international standards until before SK hynix announced the world’s first JEDEC standards-based DDR5 in November. It is widely expected to meet demand from sectors with intensive computing needs, such as big data analytics and artificial intelligence.
The researcher also hinted that memory may become very different in the post-DDR5 timeframe. A successor, which may or may not be named DDR6, is expected in five to six years. This new memory standard could be a continuation of the current trend, or something radically different like combinding DRAM with SoC technology, like putting it on the same chip as the CPU.
“We are discussing several concepts of the post DDR5,” he said. “One concept is to maintain the current trend of speeding up the data transmission, and another is to combine the DRAM technology with system-on-chip process technologies, such as CPU.”