Posted on Thursday, April 18 2019 @ 10:29 CEST by Thomas De Maesschalck
AnandTech had a call with Intel and received new details and fresh insight into the chip giant's interconnected future, which involves the combining of chiplets, the EMIB technology, and Foveros. It's too much too condense so you can read the full piece
over here.
The other element to our discussion was a reaffirmation of comments made previously by Dr. Murthy Renduchintala, Intel’s Chief Engineering Officer and Group President of the Technology, Systems, Architecture and Client Group. Ramune stated that chiplet technology and packaging technologies are designed to run asynchronously to Intel’s current manufacturing processes. Ultimately the goal here is to apply the technologies to the process currently available, rather than fixing development and tying development to a single node strategy. As we’ve seen with how Intel’s 10nm development has progressed, this disaggregation of product and technology is going to be an important step in Intel’s future.
