AMD patents describe ray tracing and new GPU instruction scheduling method

AMD filed a patent for a new, five-stage method for GPU instruction scheduling.

On June 13th, AMD published a new method for instruction scheduling of shader programs for a GPU. The method operates on fixed number of registers. It works in five stages:

Compute liveness-based register usage across all basic blocks

Computer range of numbers of waves for shader program

Asses the impact of available post-register allocation optimizations

Compute the scoring data based on number of waves of the plurality of registers

Compute optimal number of waves

This patent was filed a couple of months ago and got published at the end of last month. More details over here.

On a related note, AMD also filed a ray tracing patent in December 2017. This one also got published at the end of June. Tom's Hardware discussed it over here, the patent describes a hybrid ray-tracing solution. The solution uses a mix of dedicated hardware and existing shader units in combination with software, which is a different approach than NVIDIA, which went the hardware-acceleration route with its RT cores.

It's worth noting that this application was filed a year-and-a-half ago; AMD might have developed a new ray tracing system in the interim. But right now it seems like the company doesn't want to go the exact same route as Nvidia, which included dedicated ray tracing cores in Turing-based GPUs, and would rather use a mix of dedicated and non-dedicated hardware to give devs more flexibility.