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Intel P1265 65nm process reduces transistor leakage enourmously

Posted on Wednesday, September 21 2005 @ 01:07:55 CEST by


The Register reports Intel is developing a version of its 65nm process that will reduce transistor leakage by a factor of 1000. This will enable them to create processors with even lower power consumptions but there will be a catch; the process will halve the processor's potential performance.

This 65nm process is called P1265 and will be used for chips for cell phones and other portable devices. Full-scale production is planned somewhere in 2007 and it's likely that it will be used for Intel's future XScale processors. Other processors like the 65nm Pentium M processors that will ship by the end of this year will use the P1264 65nm process.
P1265 tweaks Intel's 'standard' 65nm process, P1264, retaining its eight-layer metal structure with copper interconnects. It too uses strained silicon techniques and low-k dielectric insulators. However, the new process raises the transistor's sub-threshold voltage using a "low-dosage implant step", equipping the ultra-shallow junction with a "high-dose implant step followed by an anneal", and thickening the gate oxide layer.

It's the latter component that impacts performance, but Intel clearly believes it has a better chip, in toto . As evidence it quotes leakage current figures: 100nA per micron for the standard 65nm process compared to 0.01nA per micron for P1265. That, the company says, yields "significant" power savings. As for the performance drop, that's relative to 65nm notebook, server and desktop chips, so should be still well in excess of what the company's XScale CPUs are offering today.



 



 

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