Intel Tiger Lake has 50 percent more L3 cache

Posted on Tuesday, September 17 2019 @ 12:23 CEST by Thomas De Maesschalck
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A readout of an engineering sample of the Intel Tiger Lake-U reveals this future chip has 50 percent more L3 cache. Based on the Willow Cove core, the Tiger Lake-U processor seen in the tweet below has four cores, eight threads, Gen12 graphics (Xe), 1000MHz to 3400MHz clockspeed, 12MB L3 cache, and AVX-512 support.



Tiger Lake is the second-generation 10nm processor series from Intel. These chips are expected in 2020.


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Thomas De Maesschalck

Thomas has been messing with computer since early childhood and firmly believes the Internet is the best thing since sliced bread. Enjoys playing with new tech, is fascinated by science, and passionate about financial markets. When not behind a computer, he can be found with running shoes on or lifting heavy weights in the weight room.



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