TSMC details LSI - its own version of EMIB

At the TSMC technology symposium, the Taiwanese foundry provided details about Local Si Interconnect (LSI), an upcoming interconnect technology that will be offered for both InFO and CoWoS packaging. AnandTech has more details of this technology. LSI is currently in pre-qualification phase. These technologies promise to enable high-performance chip designs at a lower cost.

Silicon interposers pose cost challenges as they are expensive and require quite a large silicon footprint, whilst chiplet designs which use conventional packaging on organic substrates are limited by I/O bandwidth and power efficiency. A solution to this problem has been the industry’s introduction of intermediary silicon dies that connect two logic chips together – but only in a limited scope, not using the same footprint as a full silicon interposer. Intel’s EMIB (Embedded Die Interconnect Bridge) has been the recently most talked about implementation of such technology.