The scheme starts by using what’s widely agreed to be the next generation transistor structure, called variously nanosheet, nanoribbon, nanowire, or gate-all-around device depending on who’s involved. Instead of the main part of the transistor consisting of a vertical fin of silicon as it does today, the nanosheet’s channel region consists of multiple, horizontal, nanometers-thin sheets stacked atop one another. stacked nanosheet transistors
Intel engineers used these devices to build the simplest CMOS logic circuit, an inverter. It requires two transistors, two connections to power, one input interconnect, and one output. Even when the transistors sit side-by-side, as they do today, the arrangement is very compact. But by stacking the transistors and adjusting the interconnects, the inverter’s area was cut in half.
Intel sees way to double transistor density with nanosheet stacking
Posted on Thursday, Dec 31 2020 @ 10:39 CET by Thomas De Maesschalck