AMD's 3D V-Cache uses a 9 micron pitch, which is slightly smaller than the 10 micron pitch used by Intel's Foveros Direct technology, which will debut in 2023.
At the moment, 3D chip stacking allows full die-to-die stacking, but in the future it will be possible to allow macroblocks to be stacked. AnandTech's Ian Cutress points out the future is direct circuit slicing, once the TSV pitch is dense enough to make this possible.
Eventually, the TSV pitch will be so dense that module splitting, folding or even circuit splitting will be possible, which will completely revamp the future of processors as we know them today. AMD listed all existing stacking technologies, including Intel’s Foveros/EMIB techniques, implying that AMD considered using this technology for their processors...
Packaging on @AMD:
— ????????. ???????????? ???????????????????????????? (@IanCutress) August 22, 2021
(1) Looks like they've even considered Intel at some level
(2) Microbump pitch on V-Cache is 9 micron, compared to 10 micron for Foveros
(3) Future is direct circuit slicing pic.twitter.com/m66V04lXeL